1. Field of the Invention
The present invention relates to a method for thinning a wafer, more particularly, to a method that can reduce the chipping problem during the thinning process.
2. Description of the Prior Art
In the recent years, various electronic products are aiming at becoming light, thin and small, so the manufacturers are devoting themselves to developing new processing technologies in order to increase the integrity of electronic products, for example, a “wafer thinning” technology. The wafer thinning technology is widely used in various kinds of fields, such as the back side illuminated (BSI) photo-sensor developed in the recent years. As the light in the BSI photo-sensor is collected from the back side of the pixel area, the light is not shielded by the front circuit and effective pixel areas can be increased. Consequently, the problem of noise interference can be avoided in conventional front side illuminated photo-sensors. In addition, the wafer thinning technology can also be used in chip packaging. Since the wafer can be thinner after the thinning process, the package size can become smaller.
However, there are still a lot of problems to overcome in conventional wafer thinning processes, such as the chipping problem. As the semiconductor wafer is usually made of silicon, silicon germanium or gallium arsenide, the flexibility of the wafer is poor. When the wafer is thinned to a thickness less than 300 mm, the problem of wafer chipping or breaking easily occurs during the thinning process. Please refer to FIG. 1, illustrating a schematic diagram of the wafer chipping during the wafer thinning process in conventional arts. As shown in FIG. 1, when a thinning process is performed by a wafer thinning equipment 102 upon a wafer 100, the stress applied onto the center of the wafer 100 is different from that applied onto the edge of the wafer 100 because there is a bevel 103 with a less thickness near the edge of the wafer 100. Accordingly, a chipping 104 is produced near the bevel 103 during the thinning process.
To solve this problem, a step structure 106 is provided near the edge of the wafer 100 in conventional arts. Please refer to FIG. 2 and FIG. 3, illustrating schematic diagrams of forming the step structure near the edge of the wafer in conventional arts. As shown in FIG. 2, in order to avoid chipping 104 near the edge of the wafer 100, a step structure 106 is provided near the edge of the wafer 100 in conventional arts. And, as shown in FIG. 3, during the thinning process, the step structure 106 can reduce the phenomenon of uneven stress so as to prevent the wafer 100 from chipping. Conventional methods of forming the step structure 106 include using grinding wheel or using lithography technology. However, using grinding wheel to form the step structure 106 still has a risk of producing chipping 104 and it requires additional cutting tools. Using the lithography technology requires additional mask and etching steps, which will increase manufacturing costs.